整了两星期，终于把MCBSP的DLB弄出来了！虽然DLB模式在MCBSP中并不起什么作用，但我想如果你把这个模式弄懂的话，别的基本上也都可以配置下来。以下是我的程序：
#include <stdio.h>
#include <csl.h>
#include <csl_pll.h>
#include <csl_chip.h>
#include <csl_irq.h>
#include <csl_gpio.h>
#include <csl_mcbsp.h>

//定义McBSP的句柄
MCBSP_Handle hMcbsp;
/**************************************************************/
MCBSP_Config Mcbsp2Config = {
  MCBSP_SPCR1_RMK(   
    MCBSP_SPCR1_DLB_ON,           // DLB=1 
    MCBSP_SPCR1_RJUST_RZF,
    MCBSP_SPCR1_CLKSTP_DISABLE,     // CLKSTP=0
    MCBSP_SPCR1_DXENA_OFF,         // DXENA=1,DX delay enabler on
    0,                           // Reserved=0
    MCBSP_SPCR1_RINTM_RRDY,         // RINTM=0
    MCBSP_SPCR1_RSYNCERR_NO,        // RSYNCER=0
    MCBSP_SPCR1_RFULL_NO,           // RFULL=0 
    MCBSP_SPCR1_RRDY_NO,            // RRDY=0 
    MCBSP_SPCR1_RRST_DISABLE
  ),
 
  MCBSP_SPCR2_RMK( 
    MCBSP_SPCR2_FREE_YES,           // FREE=1 
    MCBSP_SPCR2_SOFT_YES,           // SOFT=1
    MCBSP_SPCR2_FRST_RESET,         // FRST=0
    MCBSP_SPCR2_GRST_RESET,         // GRST=0
    MCBSP_SPCR2_XINTM_XRDY,         // XINTM=0
    MCBSP_SPCR2_XSYNCERR_NO,        // XSYNCER=0
    MCBSP_SPCR2_XEMPTY_NO,          // XEMPTY=0
    MCBSP_SPCR2_XRDY_NO,            // XRDY=0            
    MCBSP_SPCR2_XRST_DISABLE      // XRST=0 Disable transimitter
  ),
  
  MCBSP_RCR1_RMK(
   //MCBSP_RCR1_RFRLEN1_OF(127),
   MCBSP_RCR1_RFRLEN1_OF(0),
   MCBSP_RCR1_RWDLEN1_16BIT        // RWDLEN1=2
  ),
 
  MCBSP_RCR2_RMK(   
    MCBSP_RCR2_RPHASE_SINGLE,       // RPHASE=0
    MCBSP_RCR2_RFRLEN2_OF(0),       // RFRLEN2=0
    MCBSP_RCR2_RWDLEN2_8BIT,        // RWDLEN2=0
    MCBSP_RCR2_RCOMPAND_MSB,        // RCOMPAND=0 No companding,any size data, MSB received first
    MCBSP_RCR2_RFIG_NO,             // RFIG=1 Frame-sync ignore
    MCBSP_RCR2_RDATDLY_1BIT       // RDATDLY=1 1-bit data delay
  ), 
 
  MCBSP_XCR1_RMK(   
    //MCBSP_XCR1_XFRLEN1_OF(127),
    MCBSP_XCR1_XFRLEN1_OF(0),
    MCBSP_XCR1_XWDLEN1_16BIT        // XWDLEN1=2  
  ),  
 
  MCBSP_XCR2_RMK(  
    MCBSP_XCR2_XPHASE_SINGLE,       // XPHASE=0
    MCBSP_XCR2_XFRLEN2_OF(0),
    MCBSP_XCR2_XWDLEN2_8BIT,        // XWDLEN2=0
    MCBSP_XCR2_XCOMPAND_MSB,        // XCOMPAND=0
    MCBSP_XCR2_XFIG_NO,             // XFIG=1 Unexpected Frame-sync ignore
    MCBSP_XCR2_XDATDLY_1BIT         // XDATDLY=1 1-bit data delay
  ),           
 
  MCBSP_SRGR1_RMK(
    MCBSP_SRGR1_FWID_OF(0),               
    MCBSP_SRGR1_CLKGDV_OF(207)       // 设置SRGR1，MCBSP2的波待率为1.5M
  ),                                // 40M/1.5M=26 26-1=25
 
  MCBSP_SRGR2_RMK( 
    MCBSP_SRGR2_GSYNC_FREE,         // FREE=0
    MCBSP_SRGR2_CLKSP_RISING,       // CLKSP=0
    MCBSP_SRGR2_CLKSM_INTERNAL,     // CLKSM=1
    MCBSP_SRGR2_FSGM_FSG,      // FSGM=0
    MCBSP_SRGR2_FPER_OF(0x3ff)      // FPER=0x3ff
  ), 

  MCBSP_MCR1_DEFAULT,
  MCBSP_MCR2_DEFAULT,
 
  MCBSP_PCR_RMK(
    MCBSP_PCR_IDLEEN_RESET,          // IDLEEN=0  
    MCBSP_PCR_XIOEN_SP,              // XIOEN=0  
    MCBSP_PCR_RIOEN_SP,              // RIOEN=0  
    MCBSP_PCR_FSXM_INTERNAL,
    MCBSP_PCR_FSRM_EXTERNAL,         // FSRM=0 Receive frame-syn is provided by AIC23B
    MCBSP_PCR_SCLKME_NO,             // SCLKME=0 CLKG is taken from the McBSP internal input clock 
    MCBSP_PCR_CLKSSTAT_0,            // The signal on the CLKS pin is low  
    MCBSP_PCR_DXSTAT_0,              // Drive the signal on the DX pin low  
    MCBSP_PCR_DRSTAT_0,              // The signal on the DR pin is low  
    MCBSP_PCR_CLKXM_OUTPUT,
    MCBSP_PCR_CLKRM_INPUT,
    MCBSP_PCR_FSXP_ACTIVEHIGH,     
    MCBSP_PCR_FSRP_ACTIVEHIGH,
    MCBSP_PCR_CLKXP_RISING,
    MCBSP_PCR_CLKRP_FALLING
  ),
 
  MCBSP_RCERA_DEFAULT,
  MCBSP_RCERB_DEFAULT,
  MCBSP_RCERC_DEFAULT,
  MCBSP_RCERD_DEFAULT,
  MCBSP_RCERE_DEFAULT,
  MCBSP_RCERF_DEFAULT,
  MCBSP_RCERG_DEFAULT,
  MCBSP_RCERH_DEFAULT,
  MCBSP_XCERA_DEFAULT,
  MCBSP_XCERB_DEFAULT,
  MCBSP_XCERC_DEFAULT,
  MCBSP_XCERD_DEFAULT, 
  MCBSP_XCERE_DEFAULT,
  MCBSP_XCERF_DEFAULT, 
  MCBSP_XCERG_DEFAULT,
  MCBSP_XCERH_DEFAULT
};

interrupt void MyMcbspXmtIsr();
interrupt void MyMcbspRecIsr();
extern void VECSTART();
Uint16 MyXmtEveID,MyRecEveID,flag=0,m,temp=0;
/* 通过定义宏来控制两个外围存储器映射的寄存器，从而实现对GPIO口的控制 */
#define  GPIODIR   (*(volatile ioport Uint16*)(0x3400))
#define  GPIODATA  (*(volatile ioport Uint16*)(0x3401))
void main()
{ 
 GPIODIR = 0x80; // config the GPIO7 as output pin 
 hMcbsp=MCBSP_open(MCBSP_PORT0,MCBSP_OPEN_RESET);
 MCBSP_reset(hMcbsp);
 MCBSP_config(hMcbsp,&Mcbsp2Config);
   MyXmtEveID=MCBSP_getXmtEventId(hMcbsp);
   MyRecEveID=MCBSP_getRcvEventId(hMcbsp);
 IRQ_setVecs((Uint32)(VECSTART));
 IRQ_globalDisable();
 IRQ_clear(MyXmtEveID);
 IRQ_clear(MyRecEveID);
 IRQ_disable(MyXmtEveID);
 IRQ_disable(MyRecEveID);

 IRQ_plug(MyXmtEveID,&MyMcbspXmtIsr);
 IRQ_plug(MyRecEveID,&MyMcbspRecIsr);
 IRQ_enable(MyXmtEveID);
 IRQ_enable(MyRecEveID);
 IRQ_globalEnable();
 MCBSP_start(hMcbsp,MCBSP_SRGR_START|MCBSP_SRGR_FRAMESYNC,0xffff);
 MCBSP_start(hMcbsp,MCBSP_XMIT_START|MCBSP_RCV_START,0x300);
 while(1)
 {
   if(flag==1)
  printf("TEST PASSED\n");
 }
 
}    
interrupt void MyMcbspXmtIsr()
{
 flag=1;
 MCBSP_write16(hMcbsp,8);
 GPIODATA=0x80;
}
interrupt void MyMcbspRecIsr()
{

 temp=MCBSP_read16(hMcbsp);
}
经过最终的调度，结果与我期望的结果一样。

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